WelcomeDear Visitor, welcome to my webpage. All the information available on these pages are related to my professional activity at the Politecnico di Torino University.
Luca Sterpone is Full Professor of the CAD and Reliability group since 2021, and Head of the Control and Computer Engineering Department for the academic period 2023 - 2027.
Luca Sterpone coordinates the Aerospace and Safety Computing Lab.
The research activity of Luca Sterpone focuses on computer engineering and it covers several multidisciplinary topics such as reconfigurable computing, computer-aided design algorithms, fault tolerance and reliability. Luca is the author of more than 230 papers and he received several awards for his research activity such as the Best Paper award at the IEEE European Test Symposium (2005) and the EDAA Outstanding Dissertation Award in 2007.
He has been General Chair of ACM Computing Frontiers 2022 and Financial Co-Chair of ACM Computing Froniters 2023.
He has been Program Co-chair of HiPEAC Reconfigurable Computing Workshop (2012) and General Chair of HiPEAC WRC (2013).
He serves as member within the Program Committee of several events such as RADECS, NSREC, ISIE. He has an active collaboration with several companies: AMD Xilinx, NVIDIA, Actel, European Space Agency (ESA), Boeing Satellite Systems, Thales Alenia Space, EADS, OHB.
Luca Sterpone is an evaluator expert for the European Commission (EC) for the Horizon Europe and Horizon 2020 Programs, specifically on the following review tasks: FET HPC, ICT, Project Monitoring, EURO-HPC.
Luca Sterpone is an expert for the European Health and Digital Executive Agency (HaDEA)
Luca Sterpone has been member of the College of Expert Reviewers of the European Science Foundation (ESF) in the Period 2019-2022.
Luca Sterpone has been appointed Vice-head of the Control and Computer Engineering Department (DAUIN) for the academic period 2019 - 2023.
Luca Sterpone has been appointed as component of evaluator experts, Gruppo Esperti Valutatori for the Area 9 (GEV-09) on industrial and information engineering by the Italian Agency for the evaluation of the Universities and Research ANVUR for the evaluation of the research quality in VQR 2015-2019.
Luca Sterpone achieved the following awards:
- 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design 2018 BEST EDA TOOL AWARD for the presentation of the paper SETA: A CAD tool for Single Event Transient Analysis and Mitigation on Flash-based FPGAs written by Luca Sterpone, Sarah Azimi, Boyang Du, Luca Cattaneo and David Merodio Codinachs
- 14th International Symposium on Applied Reconfigurable Computing 2018 BEST PAPER AWARD candidate for the presentation of the paper Fast Partial Reconfiguration on SRAM-based FPGAs: A Frame-Driven Routing Approach written by Luca Sterpone and Ludovica Bozzoli
- EDAA Outstanding Dissertation Award 2007 for the PhD thesis entitled: Electronics system design techniques for safety critical applications in New directions in circuit and system test at IEEE DATE 2008 EDAA Outstanding Dissertation Award
- IEEE European Test Symposium 2005 BEST PAPER AWARD for the paper Multiple errors produced by single upsets in FPGA configuration memory: a possible solution by M. Sonza Reorda, M. Violante and L. Sterpone.
He is Associate Editor of Integration, The VLSI Journal, Elsevier
He has been member of the Technical Program Committee of the following international conferences:
- IEEE Radiation Effects on Components and Systems (2009, 2011, 2012, 2013, 2014, 2015, 2016, 2017) TPC chair for Hardening Techniques - RADECS 2020
- IEEE International Symposium on Industrial Electronics (2008, 2009, 2015)
- IEEE Conference on Adaptive Hardware and Systems (2012, 2013, 2014, 2015, 2016, 2017, 2018, 2019, 2020)
- IEEE Field Programmable Technology conference (2017, 2018, 2019, 2020)
- ACM HiPEAC WRC (2014, 2015, 2016, 2017, 2018, 2019, 2020)