The research work developed during these years mainly concerns with the reliability of digital systems. In particular, the most relevant investigation lines are:

  • DNN vulnerability: in the new era of the autonomous vehicles, there is a lack of understanding on the actual vulnerability of the systems based on Neural Networks when a fault occurs. In this way, it is very important to investigate, how these systems may react in the presence of a fault, and how to mitigate the negative effects in that cases.

  • Reliability of Approximate-based systems: Approximate computing is getting more space on different applications due to, for example the reduction of the consumed power. However, there exist many open points regarding the actual reliability of these systems, in this way, it is necessary to study the reliability evolution of this kind of new computational systems.

  • Hardware Trojan mitigation trough software and hardware techniques: Hardware Trojan attacks are appearing more dangerous during the last years due to the inclusion of third parties in the production chain. However, verification and validation techniques are not able to discover any possible external hardware intrusion; in this way, methodologies oriented to mitigate the hardware Trojan activation have been proposed exploiting code obfuscation based on hardware and software techniques.

  • Software-based strategies for testing branch prediction units: one of the most interesting speculative modules composing today superscalar processors is the branch prediction unit. A set of Software-Based Self-Test strategies have been proposed to test such modules during the normal operation mode of the devices. The techniques only requires the use of an external counter.

  • Complex digital circuit design, verification, validation, testing and diagnosis: Software-based methodologies for the automatic and manual generation of test programs, usually called Software Test Libraries (STL), have been addressed aiming at supporting the different phases of the processor design cycle. Interesting results have been obtained on academic as well as industrial processor cores.

  • Functional testing of processors cores: a comprehensive framework has been proposed and implemented in order to ease the development of test programs oriented to test the processor core during the normal operation mode. The proposed framework has been developed together with STMicroelectronics, who is currently taking advantages of the development strategies proposed there, in order to provide their customers with a set of test programs for the in field testing.

  • Evolutionary Algorithm (EA): Several techniques aiming at reinforcing the EA have been analyzed, studied and proposed aiming at facing CAD problems. Additionally, new architectural approaches have been also proposed and studied, considering in particular an automatic approach (called µGP) for test-program generation.

Please, don't hesitate to contact me if you are intereseted on these topics.